MediaTek Shifts to Intel EMIB-T for 2027 AI Chips

MediaTek has officially announced a strategic pivot in its semiconductor supply chain, selecting Intel's EMIB-T advanced packaging technology for its next-generation chip lineup. This decision marks a significant departure from the industry-standard TSMC CoWoS solution, signaling a major shift in the competitive landscape of AI hardware manufacturing.

The announcement was made during Goldman Sachs' annual tech day at COMPUTEX 2026, revealing that MediaTek's enterprise ASIC business is progressing faster than anticipated. The company plans to tape out these new designs in Q4 2026, with mass production scheduled for Q4 2027.

Key Takeaways

• Exclusive Partnership: MediaTek will exclusively use Intel's EMIB-T technology, abandoning TSMC's CoWoS for this specific project.
• Timeline: Tape-out is targeted for Q4 2026, with volume production beginning in Q4 2027.
• Cost Efficiency: Intel's approach removes the large silicon interposer, potentially lowering manufacturing costs and complexity.
• Market Impact: This move challenges TSMC's dominance in high-end AI chip packaging, a sector currently dominated by NVIDIA.
• Broader Adoption: Google is also evaluating EMIB-T for its next-generation TPU custom AI chips.
• Product Scope: While unconfirmed, the chips likely include custom AI accelerators and high-performance CPUs.

A Strategic Break from TSMC Dominance

For years, TSMC's CoWoS (Chip-on-Wafer-on-Substrate) technology has been the de facto standard for packaging high-performance AI chips. NVIDIA's H100 and B200 GPUs rely heavily on this method to connect multiple compute dies with high-bandwidth memory (HBM). However, MediaTek's decision to switch to Intel represents a bold vote of confidence in an alternative architectural approach.

CoWoS utilizes a large, expensive silicon interposer to act as a bridge between components. This method offers excellent performance but comes with high costs and yield challenges as die sizes increase. In contrast, Intel's EMIB-T (Embedded Multi-die Interconnect Bridge Technology) uses selective embedded silicon bridges. These micro-bridges connect specific components like GPU cores and memory without requiring a full-sized interposer.

This technical difference is crucial. By eliminating the need for a massive silicon slab, Intel claims to reduce both manufacturing complexity and overall unit cost. For MediaTek, which serves a broad range of customers including smartphone makers and IoT device manufacturers, cost efficiency is paramount. The ability to deliver high-performance AI computing at a lower price point could allow MediaTek to capture market share from more expensive competitors.

Furthermore, this shift diversifies MediaTek's supply chain risk. Relying solely on TSMC for both fabrication and advanced packaging creates a single point of failure. By partnering with Intel for packaging, MediaTek ensures greater flexibility in its production pipeline. This strategy mirrors broader trends in the semiconductor industry, where companies are seeking to avoid bottlenecks associated with monopolistic suppliers.

Technical Advantages of EMIB-T Architecture

Understanding why MediaTek chose EMIB-T requires a closer look at the underlying technology. Traditional 2.5D packaging, such as CoWoS, places dies side-by-side on an interposer. This interposer must be large enough to accommodate all connections, leading to significant material waste and increased likelihood of defects.

Intel's EMIB-T takes a modular approach. It embeds tiny silicon bridges only where data needs to travel between dies. This targeted connectivity reduces the footprint of the package significantly. For AI workloads, which require massive bandwidth between processing units and memory, this efficiency is critical.

Performance vs. Cost Trade-offs

• Reduced Material Usage: Less silicon is required for the interconnect layer, directly lowering bill-of-materials costs.
• Improved Yield Rates: Smaller components have higher yield rates compared to large, complex interposers.
• Scalability: EMIB-T allows for easier scaling of chiplet-based designs, enabling modular construction of larger processors.
• Thermal Management: The reduced material mass can offer different thermal dissipation characteristics, potentially aiding in cooling dense AI clusters.

Intel positions EMIB-T not just as a cheaper alternative, but as a performance-optimized solution for specific workloads. The selective bridging minimizes signal latency and power consumption compared to routing signals across a large passive interposer. As AI models grow in size, the efficiency of data movement between memory and compute units becomes a primary bottleneck. EMIB-T addresses this by shortening the physical distance data must travel within the package.

MediaTek's adoption of this technology suggests that their upcoming AI chips are designed with modularity in mind. Instead of monolithic dies, they are likely leveraging chiplet architectures. This aligns with global trends where breaking down large chips into smaller, manageable pieces improves manufacturability and performance.

Implications for the Global Semiconductor Market

This development sends shockwaves through the global semiconductor ecosystem. TSMC has enjoyed a near-monopoly on advanced AI packaging, largely due to its integration with NVIDIA's roadmap. MediaTek's move demonstrates that viable alternatives exist, potentially encouraging other fabless designers to consider Intel's foundry services.

The competition between TSMC and Intel is no longer just about transistor density; it is about holistic packaging solutions. Intel has invested billions in its Advanced Packaging facility in Arizona and expanded capabilities in Ireland and Israel. Securing a major client like MediaTek validates these investments.

Moreover, the involvement of Google in evaluating EMIB-T for its Tensor Processing Units (TPUs) adds significant weight to Intel's value proposition. If Google, a leader in custom AI silicon, adopts EMIB-T, it could trigger a cascade effect among other cloud providers and tech giants.

Market Dynamics Shift

• Increased Competition: More options for advanced packaging drive innovation and lower prices for all customers.
• Supply Chain Resilience: Diversifying packaging vendors reduces global reliance on a single geographic region or manufacturer.
• Design Flexibility: Chip designers gain more freedom to choose packaging technologies that best fit their specific performance and cost goals.
• Strategic Partnerships: We may see more exclusive deals between chip designers and packaging foundries, similar to the NVIDIA-TSMC relationship.

The timeline for this transition is aggressive. With tape-out scheduled for late 2026, MediaTek is moving quickly to bring these chips to market. The Q4 2027 mass production target means these devices could hit the market just as the next wave of AI applications demands more efficient, cost-effective hardware. This timing is strategic, aiming to capitalize on the maturation of edge AI and specialized data center accelerators.

What This Means for Developers and Businesses

For businesses and developers, the emergence of competitive packaging technologies translates to better hardware options. Currently, the high cost of AI training and inference hardware limits accessibility. If Intel's EMIB-T successfully lowers the cost of high-performance AI chips, we may see a democratization of AI compute resources.

Enterprises looking to deploy custom AI solutions may find MediaTek's upcoming chips attractive. The combination of MediaTek's design expertise and Intel's packaging efficiency could result in ASICs that offer superior performance-per-dollar ratios. This is particularly relevant for industries like automotive, IoT, and telecommunications, where cost sensitivity is high.

Developers should also monitor the software ecosystem surrounding these new chips. Hardware advancements are only as good as the tools available to program them. Intel and MediaTek will need to provide robust SDKs and optimization libraries to ensure that developers can fully leverage the benefits of EMIB-T architecture.

Looking Ahead: The Road to 2027

As we approach 2026, the semiconductor industry will watch closely to see if other major players follow MediaTek's lead. The success of this partnership hinges on execution. Intel must demonstrate that EMIB-T can scale effectively for high-volume production without compromising yield or reliability.

The potential inclusion of custom CPU designs alongside AI accelerators suggests that MediaTek is aiming for versatile system-on-chip (SoC) solutions. These chips could power everything from next-generation smartphones to autonomous driving systems. The versatility of EMIB-T makes it well-suited for such diverse applications.

Ultimately, this announcement highlights the dynamic nature of the tech industry. No single company holds a permanent monopoly on innovation. Through strategic partnerships and technological differentiation, competitors can disrupt established markets and create new opportunities for growth.

Gogo's Take

• 🔥 Why This Matters: This breaks TSMC's stranglehold on AI packaging. Lower costs mean cheaper AI hardware for everyone, accelerating adoption in edge devices and mid-range servers. It proves Intel is a serious contender in the advanced packaging race, not just a foundry follower.
• ⚠️ Limitations & Risks: Transitioning packaging technologies carries execution risk. Yield issues or compatibility problems with existing design flows could delay the 2027 launch. Additionally, Intel's foundry capacity constraints might limit initial availability compared to TSMC's mature infrastructure.
• 💡 Actionable Advice: Keep an eye on MediaTek's developer documentation releases in late 2026. Start evaluating your current AI hardware costs against projected EMIB-T based solutions. If you are designing custom ASICs, request early access to Intel's EMIB-T design kits to future-proof your roadmap.